As an emerging computing standard system characterized by openness, controllability, prosperity, and innovation, the fifth-generation reduced instruction set (RISC-V) is standing at a historical turning point from ecosystem cultivation to large-scale commercialization. Amid profound changes in global geopolitics and economic landscapes, an increasing number of countries and regions are adopting it as an autonomous computing foundation for nurturing new industries. From an industrial practice perspective, RISC-V is gradually becoming a key technical base and emerging direction for the electronic information manufacturing industry, playing a critical supporting role in the implementation of the Development Plan for the Electronic Information Manufacturing Industry during the 15th Five-Year Period.
The Inflection Point of Industrial Scale Commercialization Is Gradually Emerging
RISC-V chip shipments have exceeded 10 billion units, transitioning from embedded control to high-performance computing.
Since its inception at the University of California, Berkeley in 2010, RISC-V has traversed the complete journey from academic prototype to international open standard system over more than a decade. Leveraging characteristics such as openness, flexibility, and efficiency, RISC-V is accelerating its expansion from traditional embedded control domains into diverse tracks including cloud AI, edge computing, automotive electronics, and on-device inference. Global cumulative shipments of RISC-V chips have surpassed 10 billion units, entering the stage of large-scale commercialization in application scenarios such as IoT. An increasing number of enterprises are proactively selecting the RISC-V open architecture for product innovation based on their specific application needs.
The RVA23 Standard Has Been Implemented, Providing a Unified Baseline for the Server Ecosystem.
For a long time, fragmentation at the chip implementation layer caused by its open nature has been the primary obstacle restricting RISC-V's penetration into general-purpose high-performance domains. With the continuous refinement of the RVA23 Application Processor Profile and Server Platform Profile, fundamental breakthroughs have been achieved in RISC-V's development within general-purpose high-performance fields. The RVA23 specification incorporates capabilities such as vector operations and hardware virtualization into the mandatory baseline, strengthening binary compatibility of processor cores. Meanwhile, server platform specifications further unify system-level features such as Advanced Interrupt Architecture, IOMMU, ACPI, and UEFI, clearing standard barriers for RISC-V's entry into the server market and other general-purpose high-performance sectors, thereby consolidating the community ecosystem.
National Strategic Support Continues to Intensify, Fully Opening the "15th Five-Year Plan" Window.
Domestically, the RISC-V ecosystem is showing an accelerating trend towards formation. Organizationally, the RISC-V Working Committee, established under the guidance of the Department of Electronics and Information Technology of the Ministry of Industry and Information Technology (MIIT), broadly unites forces from industry, academia, research, and application, building a collaborative innovation system. Policy-wise, RISC-V has been incorporated into national strategic deployments. The Action Plan for Steady Growth in the Electronic Information Manufacturing Industry for 2025–2026, jointly issued by the MIIT and the State Administration for Market Regulation, explicitly states "accelerate the promotion of RISC-V industry development, fostering product technology R&D, standard system construction, application implementation, and international cooperation," opening a new historical window for industrial growth. The open-source processor "Xiangshan," jointly developed by the Institute of Computing Technology, Chinese Academy of Sciences, and Beijing Open Source Chip Research Institute, continues to iterate. The "Ruyi" RISC-V native operating system, developed by the Institute of Software, Chinese Academy of Sciences, was the first to achieve native support for the RVA23 international specification. Together, these two constitute China's leading dual RISC-V open-source root communities. Domestic operating system ecosystems such as openEuler, OpenHarmony, and openKylin are collaboratively advancing RISC-V adaptation. Specifically, openEuler has adapted over 6,000 software packages cumulatively; openKylin released the first distribution supporting RVA23; and OpenHarmony has achieved large-scale collaborative application with RISC-V in the IoT domain.
Triple Opportunities Overlap While Triple Challenges Coexist
During the "15th Five-Year Plan" period, the RISC-V industry faces three strategic opportunities. First, the opportunity for autonomy and controllability. Against the backdrop of external technology blockades and supply chain restructuring, the strategic value of RISC-V as an open instruction set architecture continues to rise, making it a key technical route for building an autonomous computing infrastructure. Second, the opportunity driven by AI and heterogeneous computing development. The explosive growth of artificial intelligence has generated robust demand for Domain-Specific Architectures (DSA) and heterogeneous computing power. RISC-V's flexible and customizable characteristics make it naturally suited for differentiated scenarios such as AI inference, edge intelligent computing, and automotive electronics, offering competitive advantages through differentiation. Third, the opportunity for open-source collaboration. The growth of open-source root communities can help China gain greater voice in global RISC-V standard-setting, while global talent and innovation resources are accelerating their convergence toward this open ecosystem.
While recognizing these opportunities, one must also clearly acknowledge the challenges facing the development of the RISC-V industry.
First, the contradiction between fragmentation and standardization remains prominent.
Openness and flexibility are strengths of RISC-V, but open customization can easily lead it into the trap of "ecosystem fragmentation." On one hand, if vendors arbitrarily add private instruction extensions or adopt differentiated IP combinations, it leads to incompatibility between hardware and software across different chip brands, significantly raising adaptation costs for operating systems, cloud platforms, and compilers. Although the release of RVA23 initiated standard convergence for high-performance applications from the source, server-level specifications for complete machine platforms, peripheral interfaces, power management, etc., are still being refined. On the other hand, standard convergence itself may limit flexibility, and perfecting the standard system is a long-cycle process that still lags behind real-world commercial demands.
Second, gaps remain in ecosystem maturity and commercial closed loops.
There is still a long way to go for RISC-V to transition from "usable" to "easy to use." Technically, single-core performance still lags behind flagship products from ARM and Intel. The open-source basic toolchain is relatively weak, affecting ordinary developers' efficiency and chip verification reliability. Server-level capabilities such as RAS (Reliability, Availability, Serviceability), security and trustworthiness, and virtualization are still being improved. Adaptation of upper-layer software such as databases, middleware, and AI frameworks is insufficient. Commercially, the general-purpose high-performance market has long been monopolized by the ecological barriers of the x86/ARM duopoly. Business models and profitability paths for RISC-V in this field need breakthroughs, while the low-end MCU/IoT sector faces fiercer market competition.
Third, support in terms of talent, capital, and intellectual property needs to be strengthened.
The long-term development of the industry ultimately depends on solid factor support. Firstly, there is a shortage of talent. RISC-V requires composite knowledge spanning processor architecture, open-source software, and hardware-software co-design. The supply of professional talent is severely insufficient, and talent training standards and certification systems are not yet sound. Secondly, capital constraints exist. Integrated circuits are inherently a long-cycle, heavy-investment industry. Coupled with the tightening capital environment in recent years, there is a lack of sufficient patient capital to support continuous R&D and ecosystem building for RISC-V. Finally, there are intellectual property risks. Chip companies designing chips based on standards still face certain patent risks in high-performance fields, and the construction of the IP ecosystem urgently needs improvement.
Promote Industry Development Through Standardization, Differentiation, and Collaboration
Adhere to Standards First, Building a Solid Foundation for a Unified and Open Ecosystem.
A computing system characterized by openness should prioritize standard convergence as its core lever, accelerating the formulation of baseline specifications in key areas. Focus should be placed on systematically formulating server platform specifications at levels including processor chips, operating systems, and firmware. Deepening hardware-software co-standardization reduces the impact of fragmentation on ecosystem unity. As an industry organization, the RISC-V Working Committee will fully leverage its hub role, connecting upstream and downstream entities such as chip design, complete machine manufacturing, basic software, and industry applications. It will form synergy in standard setting, testing and verification, and compatibility certification, effectively reducing adaptation costs across the entire industrial chain.
Focus on AI and Heterogeneous Computing, Taking the Path of Differentiated Overtaking.
Facing the ecological barriers erected by x86/ARM in general-purpose computing, while establishing benchmark products in direct competition, RISC-V should play to its strengths and avoid weaknesses. It should focus on domain-specific and heterogeneous fusion scenarios such as AI acceleration, edge inference, automotive electronics, and embodied intelligence, leveraging its open, flexible, and customizable characteristics to build local leading advantages. In particular, through deep integration of RISC-V and AI, promote "chip-system-application" collaborative innovation, achieving large-scale commercialization of high-performance chip products in differentiated tracks first, which in turn feeds back into improving general capabilities and continuously perfecting the ecosystem.
Strengthen Collaboration and Factor Support, Consolidating the Foundation for Industrial Development.
An industrial ecosystem involving multi-party collaboration among government, industry, academia, research, application, and finance should be constructed, guiding patient capital to invest in long-cycle segments such as RISC-V chips, toolchains, and basic software. Improve the RISC-V intellectual property ecosystem to reduce legal risks for enterprise innovation. Strengthen the construction of open-source root communities to enhance China's voice in global RISC-V standards and technological evolution.
Build a RISC-V Talent System to Ensure Sustained Industry Development.
Talent is the fundamental support for breakthrough development in the RISC-V industry. It is recommended to accelerate the establishment of a RISC-V talent competency standard system, clarifying knowledge and skill requirements for various roles such as processor design, system software, hardware-software co-design, and application development. Promote the alignment of RISC-V talent standards with national talent evaluation systems such as existing software proficiency exams and vocational qualification certifications, forming a closed loop of "standards—curriculum—certification—employment." Leveraging the RISC-V Working Committee to collaborate with universities, research institutes, and leading enterprises, jointly build practical training bases and open-source education projects to scale up the cultivation of composite talents possessing both architectural thinking and engineering capabilities, providing solid talent assurance for the sustainable development of the RISC-V industry during the "15th Five-Year Plan" period.
Author | Zhou Meng, Executive Secretary-General of the RISC-V Working Committee, China Electronics Industry Standardization Association
Editor | Wu Lilin
Art Editor | Ma Liya Supervising Producer | Lian Xiaodong